1. Field
The embodiments discussed herein are directed to a semiconductor device having a pattern for length measurement together with a semiconductor element in the semiconductor chip area, a method for manufacturing the semiconductor device, and a method for designing the semiconductor device.
2. Description of the Related Art
The processing size of patterns has been reduced in recent years to meet the demand for smaller and more highly integrated semiconductor devices. A stable microfabrication technique is required for this reason. Pattern size measurement, that is, line width management, is extremely important in such microfabrication.
JP-A-8-148490 discusses a technique in which a line width management-specific pattern (monitor pattern) formed on the semiconductor substrate is observed with a length measurement SEM. The monitor pattern is observed to thereby estimate the line width of the pattern of the element of the semiconductor device formed on the semiconductor chip. Such a monitor pattern is formed in a location that does not hinder the chip formation on the semiconductor substrate.
A scribe line is used as a location of the monitor pattern formation area (line width management area). The scribe line is an area for separating the semiconductor chips on the semiconductor substrate.
If the line width management area is provided in the scribe line, it is necessary that the scribe line be wide, since two line width management areas are arranged in relation to the adjacent semiconductor chip. In this case, a problem arises in that the area of the scribe line is increased, decreasing the semiconductor chip area.
JP-A-60-83344 discusses a technique in which the line width management areas are disposed in the four corners in the semiconductor chip (semiconductor chip area) respectively instead of in the scribe line.
However, since the demand for smaller and more highly integrated semiconductor devices is growing, it is becoming difficult to secure the monitor pattern formation place. Therefore, by merely forming the line width management areas in the four corners in the semiconductor chip area, reliable line width management is difficult.